Palatine rapid developers
As a future spin-off of the Technical University of Kaiserslautern, the startup project LUBIS EDA is working on solutions for chip development that are unique in the world. At HANNOVER MESSE 2022, the Palatinate-based company will demonstrate how its ideas can reduce hardware development times by 10 to 15 percent.6 May 2022
What perhaps not everyone knows is that one of the largest IT clusters in Europe is the science location Kaiserslautern. The Technical University of Kaiserslautern (TUK), for example, is an engineering and science-oriented research university with international visibility. In addition to excellent individual research, there are a large number of coordinated research networks in the Palatinate. In basic research, the German Research Foundation supports several Collaborative Research Centers and Transregios. In application-oriented research, on the other hand, the TUK is very happy to cooperate with the ten research institutes at the site. And particularly promising research approaches often lead to spin-offs, as currently demonstrated by the start-up project LUBIS EDA. At HANNOVER MESSE 2022, the future spin-off from the Technical University of Kaiserslautern will present its idea to a broad audience for the first time.
But this much can already be revealed: The young team behind LUBIS EDA is working on globally unique solutions for chip development. Internal tests have already shown that - depending on the complexity of the chip - a reduction in development time of 10 to 15 percent is within the realm of possibility. LUBIS EDA refers here to software development. There, many companies have already switched to agile methods, which offer a shorter time-to-market, fewer errors and a better ROI compared to traditional methods. According to the LUBIS-EDA team, there must also be something comparable in hardware development, an Agile Hardware Development. The mission of the Palatine team is therefore to provide methods and tools for hardware designers to apply agile concepts in hardware design, for example in the area of rapid prototyping.
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